1-V, 30-MHz memory-macrocell-circuit technology with a 0.5-/spl mu/m multi-threshold CMOS

Describes the circuit technology of a 1-V high-speed memory macrocell based on a new concept using multi-threshold CMOS (MT-CMOS). Some primitive circuits using lower threshold-voltage (Vth) transistors in memories have already been proposed for giga-scale DRAMs; low-voltage SRAM-based memory circuit scheme has not been clarified yet. The circuit technology described here makes it possible to reduce power consumption in memories without sacrificing operating speed. This is done by applying two kinds of CMOS transistors with different Vths effectively to all memory blocks. The use of a sleep function to reduce the stand-by current is also presented. 30-MHz configurable memory macrocells have been developed that operate at a voltage as low as 1 V by combining this new technology with O.5/spl mu/m process technology. These macrocells can be powered by a single NiCd battery that is ideal for portable applications.