Deterministic Built-In Self-Test Using Multiple Linear Feedback Shift Registers for Low-Power Scan Testing

Author

Lee, Lung-Jen ; Tseng, Wang-Dauh ; Lin, Rung-Bin ; Yu, Chi-Wei

Author_Institution

Dept. of Comput. Sci. & Eng., Yuan Ze Univ., Chungli, Taiwan

fYear

2009

fDate

23-26 Nov. 2009

Firstpage

111

Lastpage

116

Abstract

Large test data volume and excessive testing power are two strict challenges for VLSI testing. This paper presents a deterministic BIST using multiple LFSRs to generate the low power test set. Experimental results show, the two problems, especially in the reduction of testing power, can be significantly improved with limited hardware overhead.

Keywords

VLSI; built-in self test; circuit feedback; integrated circuit testing; low-power electronics; shift registers; BIST; LFSR; VLSI testing; built-in self-test; low-power scan testing; multiple linear feedback shift registers; test data; testing power; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Costs; Hardware; Integrated circuit testing; Linear feedback shift registers; Power generation; System testing; BIST; low-power testing; minimum transition fill; multiple LFSRs; test data compression;

fLanguage

English

Publisher

ieee

Conference_Titel

Asian Test Symposium, 2009. ATS '09.

Conference_Location

Taichung

ISSN

1081-7735

Print_ISBN

978-0-7695-3864-8

Type

conf

DOI

10.1109/ATS.2009.50

Filename

5359386

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2755335