• DocumentCode
    2755657
  • Title

    An accurate offset-compensated current comparator

  • Author

    Cataldo, G. Di ; Palmisano, G. ; Palumbo, G. ; Pennisi, S.

  • Author_Institution
    Dipartimento Elettrico, Elettronico e Sistemistico, Catania Univ., Italy
  • Volume
    2
  • fYear
    1994
  • fDate
    3-5 Aug 1994
  • Firstpage
    1107
  • Abstract
    An offset-compensated current comparator is presented which provides an accuracy better than 30 nA. Moreover, the proposed topology allows a well-controlled input resistance and bias currents to be achieved. Simulated results from 2-μm CMOS process are included
  • Keywords
    CMOS analogue integrated circuits; current comparators; error compensation; 2 micron; CMOS process; bias currents; input resistance; offset-compensated current comparator; Analog circuits; CMOS analog integrated circuits; CMOS process; CMOS technology; Capacitors; Circuit simulation; Circuit topology; Power supplies; Switches; Topology; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1994., Proceedings of the 37th Midwest Symposium on
  • Conference_Location
    Lafayette, LA
  • Print_ISBN
    0-7803-2428-5
  • Type

    conf

  • DOI
    10.1109/MWSCAS.1994.519004
  • Filename
    519004
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2755657