DocumentCode :
2755928
Title :
Fault Diagnosis under Transparent-Scan
Author :
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
fYear :
2009
fDate :
23-26 Nov. 2009
Firstpage :
29
Lastpage :
34
Abstract :
Transparent-scan provides opportunities for test compaction that do not exist with the conventional test application scheme for scan circuits. However, test compaction can reduce the ability of a transparent-scan sequence to diagnose faults. We describe a static test compaction procedure that reduces the length of a transparent-scan sequence while maintaining its stuck-at fault coverage and the number of stuck-at fault pairs it distinguishes. We use the static test compaction process as part of a process that constructs the transparent-scan sequence gradually, using test compaction to prevent the length of the sequence from becoming unnecessarily long.
Keywords :
fault diagnosis; logic testing; fault diagnosis; static test compaction procedure; stuck-at fault coverage; transparent-scan; Circuit faults; Circuit testing; Cities and towns; Clocks; Compaction; Electrical fault detection; Fault detection; Fault diagnosis; Sequential analysis; Sequential circuits; fault diagnosis; scan circuits; static test compaction; stuck-at faults; transparent-scan;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Asian Test Symposium, 2009. ATS '09.
Conference_Location :
Taichung
ISSN :
1081-7735
Print_ISBN :
978-0-7695-3864-8
Type :
conf
DOI :
10.1109/ATS.2009.12
Filename :
5359418
Link To Document :
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