Performance Evaluation of RFID Anti-Collision Algorithm with FPGA Implementation

Radio frequency identification (RFID) is an emerging wireless technology with highly promising applications in the future pervasive computing scenario. In an RFID system, the anti-collision algorithm is one of the primary mechanisms to address the issue of multi-object identification. This paper firstly introduces the basics of the anti-collision algorithm in RFID system. Then, field programmable gate array (FPGA) implementation for the algorithm is presented in detail for the sake of avoiding the disadvantage of pure software-based development. In particular, the Manchester coder and decoder for the RFID system have been realized and simulated by using FPGA simulator. The performance of the anti-collision algorithm is evaluated with respect to the metrics the largest number of identified tags per reading, the identification speed and the algorithm efficiency. The methodology and also the result are helpful for designing, deploying and implementing a practical RFID system.