Title :
A power estimation model for high-speed CMOS A/D converters
Author :
Lauwers, E. ; Gielen, G.
Author_Institution :
Dept. of Electr. Eng., Katholieke Univ., Leuven, Belgium
Abstract :
Power estimation is important for system-level exploration and trade-off analysis of VLSI systems. A power estimator for high-speed analog to digital converters that exploits information from reported designs is presented. The estimator is an analytical expression which is independent of the actual topology used and can easily be updated with new published designs. Experimental results show a good predictor accuracy of better than a factor 2.2 for most designs
Keywords :
CMOS integrated circuits; VLSI; analogue-digital conversion; high-speed integrated circuits; integrated circuit design; integrated circuit modelling; VLSI system; high-speed CMOS analog-digital converter; power estimation model; system-level design; trade-off analysis; Accuracy; Analog-digital conversion; Costs; Counting circuits; Investments; Productivity; Read only memory; Semiconductor device modeling; Topology; Very large scale integration;
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition 1999. Proceedings
Conference_Location :
Munich
Print_ISBN :
0-7695-0078-1
DOI :
10.1109/DATE.1999.761155
