DocumentCode :
275739
Title :
Transputer implementation of fault tolerant distributed architecture for critical real-time application
Author :
Sinha, A. ; Chaudhuri, A. ; Das, P.K.
Author_Institution :
Jadavpur Univ., Calcutta, India
fYear :
1991
fDate :
16-18 Sep 1991
Firstpage :
239
Lastpage :
243
Abstract :
The systems which perform mission-critical functions, as used in close-loop guidance and event sequencing for various real-time applications consider fault-tolerance as one of their desirable architectural attributes. Such systems are required to be extremely reliable and the work described is an optimistic approach to meet this reliability requirement through a communication architecture of distributed transputers. The fault diagnosis procedure is such that the detection of faulty nodes does not require any central observer and the architecture in true sense remains distributed. The reconfiguration of the system by the replacement of faulty nodes are automatically taken up by the spare nodes. The approach is implemented on eight nodes using multiple 32-bit transputers and the complete software is developed in OCCAM
Keywords :
fault tolerant computing; parallel architectures; parallel programming; real-time systems; software reliability; transputers; OCCAM; architectural attributes; close-loop guidance; communication architecture; critical real-time application; distributed transputers; event sequencing; fault diagnosis procedure; fault tolerant distributed architecture; fault-tolerance; faulty nodes; mission-critical functions; multiple 32-bit transputers; optimistic approach; real-time applications;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Software Engineering for Real Time Systems, 1991., Third International Conference on
Conference_Location :
Cirencester
Print_ISBN :
0-85296-526-5
Type :
conf
Filename :
140079
Link To Document :
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