DocumentCode
2758622
Title
An efficient CORDIC arithmetic unit for 3-phase voltage grid synchronization
Author
González-Espín, Fran ; Figueres, Emilio ; Garcerá, Gabriel ; Patrao, Iván
Author_Institution
Dept. de Ing. Electron., Univ. Politec. de Valencia, Valencia, Spain
fYear
2011
fDate
27-30 June 2011
Firstpage
125
Lastpage
130
Abstract
The aim of this paper is to implement the CORDIC algorithm in the most used 3-phase voltage grid synchronization techniques. The CORDIC algorithm is an efficient trigonometric calculus processor, which makes possible to solve complex trigonometric functions by means of a shift-adder structure, thus obtaining a very efficient calculus core which achieves a short computation time when used in FPGA or ASIC platforms.
Keywords
adders; digital arithmetic; field programmable gate arrays; power convertors; synchronisation; 3-phase voltage grid synchronization; ASIC platforms; CORDIC arithmetic unit; FPGA; shift-adder structure; trigonometric calculus processor; Calculus; Harmonic analysis; Low pass filters; Power harmonic filters; Synchronization; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Electronics (ISIE), 2011 IEEE International Symposium on
Conference_Location
Gdansk
ISSN
Pending
Print_ISBN
978-1-4244-9310-4
Electronic_ISBN
Pending
Type
conf
DOI
10.1109/ISIE.2011.5984144
Filename
5984144
Link To Document