DocumentCode
2758625
Title
A 0.65V, 2.4GHz CMOS low-noise amplifiers design with noise optimization
Author
Khan, M. Zamin ; Wang, Yanjie ; Ali, Shaima Mohammed ; Raut, R.
Author_Institution
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que.
fYear
2005
fDate
1-4 May 2005
Firstpage
673
Lastpage
676
Abstract
A 0.65 V, 2.4 GHz low noise amplifier (LNA) has been designed and simulated using spectre simulator in a standard TSMC 0.18 mum CMOS technology. With low power and noise optimization techniques, the amplifier provides a gain of 27 dB, a noise figure of only 1.1 dB, power dissipation of 4.6 mW from a 0.65 V power supply
Keywords
CMOS analogue integrated circuits; low noise amplifiers; 0.18 mum; 0.65 V; 1.1 dB; 2.4 GHz; 27 dB; CMOS low-noise amplifiers; LNA; noise optimization; power dissipation; spectre simulator; standard TSMC; Capacitance; Circuit noise; Design optimization; Impedance; Inductors; Low-noise amplifiers; MOS devices; Noise figure; Noise generators; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 2005. Canadian Conference on
Conference_Location
Saskatoon, Sask.
ISSN
0840-7789
Print_ISBN
0-7803-8885-2
Type
conf
DOI
10.1109/CCECE.2005.1557020
Filename
1557020
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