DocumentCode
2758709
Title
An encoder for a 5GS/s 4-bit flash ADC in 0.18/spl mu/m CMOS
Author
Sheikhaei, Samad ; Mirabbasi, Shahriar ; Ivanov, Andre
Author_Institution
Dept. of Electr. & Comput. Eng., British Columbia Univ.
fYear
2005
fDate
1-4 May 2005
Firstpage
698
Lastpage
701
Abstract
In this paper, a high-speed encoder intended for a 5GS/S 4-bit flash analog-to-digital converter (ADC) is presented. To meet the speed and power targets of the ADC, low-swing signaling is used in all the internal sub-blocks of the ADC including the encoder. To further enhance the speed performance of the encoder, 2-stage pipelining is utilized. In addition, the encoder is implemented in current mode logic (CML). The circuit is designed and simulated in a 0.18 mum CMOS technology. It consumes 4 mW from a 1.8 V supply while operating at 5 GHz
Keywords
CMOS logic circuits; analogue-digital conversion; current-mode logic; encoding; 0.18 micron; 1.8 V; 2-stage pipelining; 4 bit; 4 mW; 5 GHz; CMOS technology; analog-to-digital converter; current mode logic; high-speed encoder; low-swing signaling; speed performance enhancement; Analog-digital conversion; Binary codes; CMOS logic circuits; CMOS technology; Calibration; Circuit simulation; Laser radar; Pipeline processing; Reflective binary codes; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 2005. Canadian Conference on
Conference_Location
Saskatoon, Sask.
ISSN
0840-7789
Print_ISBN
0-7803-8885-2
Type
conf
DOI
10.1109/CCECE.2005.1557025
Filename
1557025
Link To Document