VLSI thermo-mechanical stress analysis by gradient direction sensor method

Silicon integrated sensors for thermo-mechanical stress measurement in VLSI (very large scale integration) has been studied extensively in recent years due to the increasing complexity of modern semiconductor devices. As chip size has increased continuously to accommodate more functions in modern integrated circuits (IC) technology, the stress induced in a chip from packaging combined with self heating becomes serious and may result in device degradation, circuit malfunction and even chip cracking. Therefore, for safe operation, it is necessary to construct thermo-mechanical stress monitoring tools to determine the spatial induced stress and study possible alternative heat sources placement or distribution that are capable in reducing level of thermo-mechanical stress. This paper presents VLSI thermo-mechanical stress analysis by gradient direction sensor (GDS). This investigation uses a thermal heat sources emplacement approach to estimate and predict stress and distortion of WSI (wafer scale integration) chip junction. Hence, the geometrical coordinates of the investigated source can be obtained by applying the gradient direction sensors. Then finite element method (FEM) is used to build models to validate thermal peaks prediction by GDS method. In this way we can explore the possibilities to minimize the thermal peaks in the critical areas for packaged BGA (ball grid array) WSI devices. Several considerations guided our study for a judicious placement of different sensors. That will enable us to establish the most homogeneous thermo-mechanical cartography