DocumentCode :
2758840
Title :
Analysis of DC simulation convergence of nonlinear analog circuits with initial solution
Author :
Morneau, Michel ; Khouas, Abdelhakim
Author_Institution :
Dept. of Electr. Eng., Ecole Polytech. de Montreal, Que.
fYear :
2005
fDate :
1-4 May 2005
Firstpage :
726
Lastpage :
730
Abstract :
The CPU time spent to repeatedly simulate a circuit with slight variations in the parameters is generally high, even if full accuracy is not required. This paper proposes a method to end the Newton-Raphson (NR) iterative algorithm before convergence in DC analysis in order to reduce the number of NR iterations. In the case of an initial solution approximation is used, the analysis of the NR algorithm behaviour until convergence is presented in order to approximate the accuracy of the solution at each iteration. We show that the use of a large SPICE reltol parameter value is a way to specify a desired accuracy, allowing reducing the number of NR iterations, as a time/accuracy trade-off. Experimentally, 14%-65% reduction in terms of NR iterations is obtained for DC simulation, compared to the usual SPICE simulation until convergence. Our method is particularly efficient in the case of slightly nonlinear circuits since the initial solution guess is generally accurate. The method is intended to some applications requiring multiple simulations of the same circuit with parameter modifications, such as automatic sizing, fault simulation and Monte-Carlo analysis, in which a solution approximation is available from previous simulation results and for which full accuracy is not required
Keywords :
Monte Carlo methods; Newton-Raphson method; SPICE; analogue circuits; circuit simulation; DC analysis; DC simulation convergence; Monte-Carlo analysis; Newton-Raphson iterative algorithm; automatic sizing; fault simulation; initial solution approximation; large SPICE reltol parameter; nonlinear analog circuits; parameter modifications; Algorithm design and analysis; Analog circuits; Analytical models; Approximation algorithms; Central Processing Unit; Circuit faults; Circuit simulation; Iterative algorithms; Nonlinear circuits; SPICE;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical and Computer Engineering, 2005. Canadian Conference on
Conference_Location :
Saskatoon, Sask.
ISSN :
0840-7789
Print_ISBN :
0-7803-8885-2
Type :
conf
DOI :
10.1109/CCECE.2005.1557032
Filename :
1557032
Link To Document :
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