Title :
Development of fast 3d parasitic extraction using hierarchical method for integrated circuits and packages
Author :
Yi, Yang ; Yan, Shu ; Sarin, Vivek ; Shi, Weiping
Author_Institution :
Texas A&M Univ., College Station, TX
Abstract :
Fast and accurate 3D parasitic extraction is very important in design and verification of very large scale integration (VLSI) circuits and electronic packages. In this paper, we review our research in the parasitic extraction using preconditioned hierarchical method, which is a significant improvement over existing methods.
Keywords :
VLSI; integrated circuit packaging; 3D parasitic extraction; electronic packages; integrated circuits; very large scale integration circuits; Capacitance; Conductors; Data mining; Data structures; Integrated circuit packaging; Linear systems; Matrix converters; Sparse matrices; Vectors; Very large scale integration;
Conference_Titel :
Antennas and Propagation Society International Symposium, 2008. AP-S 2008. IEEE
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4244-2041-4
Electronic_ISBN :
978-1-4244-2042-1
DOI :
10.1109/APS.2008.4618920
