Low power self-checking two-rail code checker design

Totally self-checking (TSC) system can execute on-line testing in normal operation mode and immediately detect the fault existing in a system to enhance reliability. In this paper, a novel non-tree structure two-rail code self-checking checker (denoted by TCC-P) is proposed. Based on TSMC 0.18um process technology, the real chip is designed and verified. The experiment results show that the proposed checker has reduced 39.30% power dissipation with the penalty of little area overhead as compared with the best one previous work. The feature of both lower power and the capability to work in both clock phases confirm our design is valid and efficient.