Micro-scratch reduction of replacement metal gate aluminum chemical mechanical polishing at 28nm technology node

Author

Hsu, C.W. ; Huang, R.P. ; Lin, Welch ; Huang, C.C. ; Hsieh, Y.L. ; Tsao, W.C. ; Chen, C.H. ; Lin, Y.M. ; Hung, T.H. ; Hsu, H.K. ; Wang, C.H. ; Wu, J.Y.

Author_Institution

Adv. Technol. Dev. Div., United Microelectron. Corp., Tainan, Taiwan

fYear

2012

fDate

4-6 June 2012

Firstpage

1

Lastpage

3

Abstract

The defectivity control of replacement metal gate (RMG) chemical mechanical polishing was important for high-k metal gate (HKMG) process. Micro-scratches of RMG CMP easily caused shorting or open of devices. In this study, the micro-scratch reduction of aluminum chemical mechanical polishing (AlCMP) has been investigated to provide solutions for preventing the formation of micro-scratches. Micro-scratches can be reduced by implementing soft pads at platen 2 and platen 3, pad cleaning chemical, and optimized post cleaning condition. Soft pads can reduce micro-scratch levels of AlCMP process, especially at platen 2. However, AlCMP with soft pads easily suffer serious dishing or erosion. Therefore, the balance between micro-scratches and dishing or erosion was crucial for pad selection of AlCMP. Besides, removal of pad stain was also important. Pad stain removed by pad cleaning chemical could get a lower micro-scratch level of AlCMP. In addition to polishing process, post cleaning process was a source of micro-scratch for AlCMP. An unsuitable post cleaning condition caused a counter effect of micro-scratch reduction.

Keywords

CMOS integrated circuits; MOSFET; chemical mechanical polishing; high-k dielectric thin films; surface cleaning; AlCMP process; HKMG process; RMG CMP; defectivity control; high-k metal gate process; lower microscratch level; microscratch reduction counter effect; microscratches formation prevention; optimized post cleaning condition; pad cleaning chemical; pad selection; pad stain removal; platen 2; platen 3; replacement metal gate aluminum chemical mechanical polishing; serious dishing; serious erosion; size 28 nm; soft pads; technology node; Abstracts; CMOS integrated circuits; Logic gates; Optimization; Polymers;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference (IITC), 2012 IEEE International

Conference_Location

San Jose, CA

ISSN

pending

Print_ISBN

978-1-4673-1138-0

Electronic_ISBN

pending

Type

conf

DOI

10.1109/IITC.2012.6251583

Filename

6251583