DocumentCode :
2760481
Title :
NBTI degradation with optimized ID-VG sweep for wafer fabrication monitoring
Author :
Soon, F.Y. ; Soin, N.
Author_Institution :
Dept. of Electr. Eng., Univ. of Malaya, Kuala Lumpur, Malaysia
fYear :
2011
fDate :
19-20 July 2011
Firstpage :
272
Lastpage :
276
Abstract :
NBTI degradation mechanism is studied for 0.18μm pMOSFETs. Degradation on saturation and linear mode of operations are investigated respectively. To address the controlled delay in between stress cycles which account for the recovery effect, an optimized ID-VG sweep is devised in this work. The optimized ID-VG sweep is found to be able to reduce the recovery effect and it is easily to be implemented in typical DC parametric production tester in wafer fabrication manufacturing environment.
Keywords :
MOSFET; semiconductor device manufacture; test equipment; DC parametric production tester; NBTI degradation mechanism; controlled delay; linear mode; negative bias temperature instability; optimized ID-VG sweep; pMOSFET; saturation mode; size 0.18 mum; wafer fabrication manufacturing environment; wafer fabrication monitoring; Degradation; Delay; Logic gates; MOSFETs; Monitoring; Reliability; Stress; Measurement Delay; NBTI; Wafer Fabrication Monitoring; pMOSFET;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design (ASQED), 2011 3rd Asia Symposium on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4577-0145-0
Type :
conf
DOI :
10.1109/ASQED.2011.6111759
Filename :
6111759
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2760481
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