Title :
Deep submicron device isolation with high scalability and manufacturability for ULSI
Author :
Chang, Patrick Shuo-Tung ; Hu, Hung-Kwei ; Chiu, K.Y.
Author_Institution :
Hewlett-Packard Co., Palo Alto, CA, USA
Abstract :
An isolation scheme employing a reactive-ion etch directly into field oxide to define the isolation areas is presented. This technique features process simplicity, no field thinning at narrow isolation spacings, negligible pattern transfer difference, freedom from defects and narrow-width effects, and excellent electrical isolation and active device characteristics. This technology has been proved to be highly scalable and manufacturable for deep-submicron ULSI (ultra-large-scale integration)
Keywords :
VLSI; integrated circuit technology; sputter etching; ULSI; active device characteristics; deep submicron device isolation; electrical isolation; manufacturability; reactive-ion etch; scalability; Implants; Isolation technology; MOSFETs; Manufacturing processes; Resists; Scalability; Stress; Threshold voltage; Ultra large scale integration; Wet etching;
Conference_Titel :
VLSI Technology, Systems and Applications, 1989. Proceedings of Technical Papers. 1989 International Symposium on
Conference_Location :
Taipei
DOI :
10.1109/VTSA.1989.68640