An 8 bit presettable/programmable synchronous counter/divider

Author

Choomchuay, Somsak ; Supadech, Somkiat ; Sangworasilp, Manus

Author_Institution

King Monkut´´s Inst. of Technol., Ladkrabang, Bangkok, Thailand

fYear

1989

fDate

26-28 Apr 1989

Firstpage

230

Lastpage

233

Abstract

The authors describe the design and implementation of an ASIC (application-specific integrated circuit) chip. The design is a J-K flip-flop-based counter. With appropriate control circuitry, this chip can function as a multimode counter/divider subsystem. The device was fabricated using a 5-μm p-well polysilicon-gate CMOS process. It is noted that, due to its versatility, this ASIC has many potential applications

Keywords

CMOS integrated circuits; application specific integrated circuits; counting circuits; dividing circuits; flip-flops; 5 micron; 8 bits; ASIC; J-K flip-flop-based counter; multimode counter/divider subsystem; p-well polysilicon-gate CMOS process; presettable/programmable synchronous counter/divider; Application specific integrated circuits; Australia; CMOS process; CMOS technology; Clocks; Counting circuits; Flip-flops; Microelectronics; Research and development; Signal generators;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Manufacturing Technology Symposium, 1989, Proceedings. Japan IEMT Symposium, Sixth IEEE/CHMT International

Conference_Location

Nara

Type

conf

DOI

10.1109/IEMTS.1989.76144

Filename

76144

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2761479