DocumentCode
2762496
Title
Industrial evaluation of DRAM SIMM tests
Author
Van de Goor, Ad J. ; Paalvast, Alexander
Author_Institution
Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
fYear
2000
fDate
2000
Firstpage
426
Lastpage
435
Abstract
This paper describes the results of testing 50 single inline memory modules (SIMMs) each containing 16 16 Mbit DRAM chips (DUTs); 39 SIMMs failed, and of the 800 DUTs, 116 failed. In total 54 different test algorithms have been applied, using up to 168 different stress combinations for each test. The results show that GAL9R is the best test. Furthermore, it is shown that burst mode tests detect a completely different class of faults as compared with traditional word mode tests, and that tests with address scrambling enabled the detection of more faults
Keywords
DRAM chips; automatic testing; integrated circuit testing; logic testing; modules; production testing; semiconductor storage; DRAM SIMM tests; GAL9R test; Mbit DRAM chips; address scrambling; burst mode tests; industrial evaluation; single inline memory modules; test algorithms; word mode tests; Computer architecture; Electronic mail; Fault detection; Information technology; Manuals; Performance evaluation; Production; Random access memory; Stress; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2000. Proceedings. International
Conference_Location
Atlantic City, NJ
ISSN
1089-3539
Print_ISBN
0-7803-6546-1
Type
conf
DOI
10.1109/TEST.2000.894234
Filename
894234
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