DocumentCode :
2763245
Title :
Performance Boosting of Peripheral Transistor for High Density 4Gb DRAM Technologies by SiGe Selective Epitaxial Growth Technique
Author :
Jung, I.S. ; Lee, S.-G. ; Lee, Dong-Ho ; Lee, E.-C. ; Kim, Wonhee ; Kang, Peter Kyungchul ; Son, Yong-Hwan ; Kang, Sae-Kyoung ; Kim, Jong-Boo ; Kim, Ye-Ram ; Lee, Ko-Hsin ; Kang, Min-Gyu ; Kim, Heonhwan ; Lee, Jong-Wook ; Shin, Y.G. ; Chung, U-In ; Moon,
Author_Institution :
Memory Div., Samsung Electron. Co., Ltd., Yongin
fYear :
2006
fDate :
15-17 May 2006
Firstpage :
1
Lastpage :
2
Abstract :
The SiGe SD structure in peripheral PMOS area of DRAM was successfully integrated without any degradation of peripheral NMOS properties, which is the first approach to DRAM. The PMOS performance enhancement was found to be more than 40%. The authors suggest the SiGe SD structure as the key solution for the improvement of peripheral PMOS transistor properties in sub-50nm DRAM technology
Keywords :
DRAM chips; Ge-Si alloys; MOS memory circuits; epitaxial growth; semiconductor materials; 4 GBytes; 50 nm; DRAM technology; PMOS transistors; SiGe; peripheral NMOS property; peripheral transistor; selective epitaxial growth; Boosting; Boron; Business; Compressive stress; Electrostatic discharge; Epitaxial growth; Germanium silicon alloys; Moon; Random access memory; Silicon germanium;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SiGe Technology and Device Meeting, 2006. ISTDM 2006. Third International
Conference_Location :
Princeton, NJ
Print_ISBN :
1-4244-0461-4
Type :
conf
DOI :
10.1109/ISTDM.2006.246571
Filename :
1715940
Link To Document :
بازگشت