Chip-level Synchronization for Ad Hoc Enabled UTRA-TDD Networks

Author

Du, Lin ; Shang, Dan ; Zhang, Yan

Author_Institution

Wireless Commun. Group, Philips Res. East Asia, Shanghai

fYear

2007

fDate

11-15 March 2007

Firstpage

1172

Lastpage

1176

Abstract

This paper proposes and evaluates a reception chip-level synchronization scheme for ad-hoc enabled UTRA-TDD networks. Since ad hoc users directly communicating with each other, the conventional pilot signals from base stations are no longer available for chip-level synchronization. A new scheme of using the training sequences (midamble) in each traffic time slot with customized correlation detection window is proposed for the synchronization establishment and maintenance for any single hop direct links. Link-level simulations are performed to evaluate the performance of the scheme. The conventional method using pilot signals from base stations are tested for benchmarking. The results show that using midamble for the reception synchronization for ad-hoc enabled UTRA-TDD networks is feasible.

Keywords

ad hoc networks; synchronisation; time division multiplexing; UTRA-TDD networks; ad hoc networks; base stations; chip-level synchronization; correlation detection window; link-level simulations; pilot signals; reception synchronization; single hop direct links; Ad hoc networks; Base stations; Communications Society; Convergence; Frequency synchronization; Land mobile radio cellular systems; Matched filters; Physical layer; Robustness; Wireless LAN;

fLanguage

English

Publisher

ieee

Conference_Titel

Wireless Communications and Networking Conference, 2007.WCNC 2007. IEEE

Conference_Location

Kowloon

ISSN

1525-3511

Print_ISBN

1-4244-0658-7

Electronic_ISBN

1525-3511

Type

conf

DOI

10.1109/WCNC.2007.222

Filename

4224467