Title :
Investigation of Geometry Scaling Effect on Si BJT and SiGe HBT fabricated on SOI Substrates
Author :
Liao, S.H. ; Chang, S.T. ; Lin, Colin Yu
Abstract :
In this paper, the key design device parameter of SOI such as the buried oxide thickness, lateral scaling, and thermal effect are studied by 2D device simulator DESSIStrade
Keywords :
Ge-Si alloys; heterojunction bipolar transistors; silicon-on-insulator; 2D device simulator; DESSIS; SOI substrates; Si BJT; SiGe; SiGe HBT; buried oxide thickness; geometry scaling effect; heterojunction bipolar transistor; thermal effect; BiCMOS integrated circuits; Breakdown voltage; Doping; Geometry; Germanium silicon alloys; Heterojunction bipolar transistors; Physics; RF signals; Radio frequency; Silicon germanium;
Conference_Titel :
SiGe Technology and Device Meeting, 2006. ISTDM 2006. Third International
Conference_Location :
Princeton, NJ
Print_ISBN :
1-4244-0461-4
DOI :
10.1109/ISTDM.2006.246491
