• DocumentCode
    2764215
  • Title

    Study of Surface Roughness and Dislocation Generation in Strained Si Layers Grown on Thin Strain-Relaxed Buffers for High Performance MOSFETs

  • Author

    Escobedo-Cousin, E. ; Olsen, Svein Harald ; Bull, S.J. ; O´Neill, A.G. ; Coulson, H. ; Claeys, Cor ; Loo, Roger ; Delhougne, R. ; Caymax, M.

  • Author_Institution
    Newcastle Univ.
  • fYear
    2006
  • fDate
    15-17 May 2006
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    In this work, the impact of high temperature annealing typical of CMOS processing on the surface morphology of thin SiGe SRBs is investigated for strained silicon layers above and below the critical thickness
  • Keywords
    Ge-Si alloys; MOSFET; buffer layers; dislocation arrays; surface morphology; surface roughness; CMOS processing; MOSFET; SiGe; dislocation generation; high temperature annealing; strained Si layers grown; strained silicon layers; surface morphology; surface roughness; thin SiGe SRB; thin strain-relaxed buffers; Annealing; Epitaxial growth; Germanium silicon alloys; MOSFETs; Optical surface waves; Rough surfaces; Silicon germanium; Surface morphology; Surface roughness; Temperature;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SiGe Technology and Device Meeting, 2006. ISTDM 2006. Third International
  • Conference_Location
    Princeton, NJ
  • Print_ISBN
    1-4244-0461-4
  • Type

    conf

  • DOI
    10.1109/ISTDM.2006.246495
  • Filename
    1715989
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2764215