DocumentCode
2764283
Title
Parallel analysis method for a power electronic system by circuit partitioning
Author
Kato, Toshiji ; Inoue, Kaoru ; Koga, Fumiaki ; Kotani, Yukiko
Author_Institution
Dept. of Electr. Eng., Doshisha Univ., Kyoto, Japan
fYear
2012
fDate
10-13 June 2012
Firstpage
1
Lastpage
8
Abstract
This paper proposes a new parallel circuit simulation method which divides the whole circuit into subcircuits by applying an explicit integration formula to selected energy storage elements such as inductors and/or capacitors. Specifically, the forward Euler (FE) formula is applied to selected series inductors and parallel capacitors. Then an implicit formula such as the backward Euler (BE) formula is applied for stable numerical integration, and the optimum step size is selected for each subcircuit. This paper describes first the principle of the proposed method, then the processes by which it is applied. Then it describes a parallel method which utilizes thread processing techniques based on OpenMP application program interfaces with multicore CPU and shared-memory system to reduce its processing time. As application examples, this paper includes analysis of an AC-DC converter, and a series-connected circuit of a three-phase converter and a modified hysteresis controlled PWM single-phase and three-phase inverters. Its efficiency is proven by the effect of reducing circuit sizes and parallel processing.
Keywords
AC-DC power convertors; PWM invertors; circuit simulation; energy storage; power electronics; AC-DC converter; OpenMP; backward Euler formula; circuit partitioning; energy storage elements; explicit integration formula; forward Euler formula; hysteresis controlled PWM single-phase inverters; hysteresis controlled PWM three-phase inverters; multicore CPU; parallel analysis method; parallel capacitors; parallel circuit simulation; power electronic system; series inductors; series-connected circuit; shared-memory system; stable numerical integration; three-phase converter; AC-DC power converters; Capacitors; Inductors; Instruction sets; Iron; Parallel processing; Synchronization;
fLanguage
English
Publisher
ieee
Conference_Titel
Control and Modeling for Power Electronics (COMPEL), 2012 IEEE 13th Workshop on
Conference_Location
Kyoto
ISSN
1093-5142
Print_ISBN
978-1-4244-9372-2
Electronic_ISBN
1093-5142
Type
conf
DOI
10.1109/COMPEL.2012.6251794
Filename
6251794
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