Characterization of a SiGe Layer After Isotropic Etching of Surrounding Si

Among the new architectures that are under development for the very advanced technological nodes, the SON transistors are very promising, insofar as they allow a better electrostatic control of the conduction, compared with standard MOSFETs. The consequence is a limited power loss, which is desirable for mobile devices applications. Several publications from Monfray et al. describe the SON concept and its associated technology. In order to take advantage of the mobility improvement brought by SiGe as a new material for the conduction channel, the SON technology can be recovered and adapted so as to fit with new requirements, including the use of a Si sacrificial layer instead of the previously used SiGe. In that aim, we have developed an isotropic etching process that enables removing Si with a very high selectivity to SiGe. This process has been described and a mechanism has been suggested. This paper is a continuation of this work, as we confirm the twofold mechanism of etching and passivation during the process, and we propose a more precise screenplay for it