DocumentCode
2765266
Title
Cooperative Bounded Model Checking Using STE and Hybrid Three-Valued SAT Solving
Author
Deng, Shujun ; Wu, Weimin ; Bian, Jinian
Author_Institution
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing
fYear
2006
fDate
3-5 May 2006
Firstpage
1
Lastpage
7
Abstract
This paper presents a cooperative bounded model checking (BMC) method for RTL designs. The method firstly extends the Boolean DPLL algorithm into a unified procedure to solve hybrid satisfiability problems for RTL circuits, and then changes this solver to a hybrid three-valued SAT solver. Symbolic trajectory evaluation (STE) assertions are transformed to a three-valued problem combining the expansion method in BMC and the abstraction of STE. The experimental results comparing with ordinary BMC which based on an ordinary hybrid SAT solver demonstrate the efficiency of our approach
Keywords
Boolean functions; computability; formal verification; groupware; logic CAD; Boolean DPLL algorithm; RTL circuit design; cooperative bounded model checking; hybrid satisfiability problems; hybrid three-valued SAT solving; symbolic trajectory evaluation; Circuits; Collaborative work; Computer bugs; Computer science; Design methodology; Formal verification; Hardware; Large-scale systems; Logic; Microprocessors; Bounded Model Checking; Cooperative verification; Hybrid SAT solving; Symbolic Trajectory Evaluation;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Supported Cooperative Work in Design, 2006. CSCWD '06. 10th International Conference on
Conference_Location
Nanjing
Print_ISBN
1-4244-0164-X
Electronic_ISBN
1-4244-0165-8
Type
conf
DOI
10.1109/CSCWD.2006.253184
Filename
4019220
Link To Document