Title :
Low-power, wide-range time-to-digital converter for all digital phase-locked loops
Author :
Jeong, Chan-Hui ; Kwon, C.-K. ; Kim, Heonhwan ; Hwang, In-Chul ; Kim, Soo-Won
Author_Institution :
Dept. of Nano Semicond. Eng., Korea Univ., Seoul, South Korea
Abstract :
A time-to-digital converter (TDC) for a low-power, wide-range all digital phase-locked loop (ADPLL) is presented. The proposed TDC uses an enabling signal with variable duration to achieve low power and wide range. For verification purpose, the ADPLL is fabricated in a 0.11 μm CMOS technology. The ADPLL dissipates 6.02mW at an output frequency of 1.68GHz and its output frequency is measured as 0.24-1.68 GHz from a 1.2 V supply.
Keywords :
CMOS integrated circuits; UHF integrated circuits; digital phase locked loops; low-power electronics; time-digital conversion; ADPLL; CMOS technology; TDC; frequency 0.24 GHz to 1.68 GHz; low-power wide-range all digital phase-locked loop; low-power wide-range time-to-digital converter; power 6.02 mW; size 0.11 mum; voltage 1.2 V;
Journal_Title :
Electronics Letters
DOI :
10.1049/el.2012.3434
