Dual Nanowire PMOSFET with Thin Si Bridge and TaN Gate

This paper demonstrates a high performance nanowire PMOSFET built on silicon-on-insulator (SOI) platform. Self-limiting oxidation technique was exploited for dual nanowire channel formation. To further improve the performance of the device, the TaN metal gate is used instead of the conventional polysilicon gate. The thin silicon bridge between the two nanowires is able to boost the drive current significantly, without degrading the short channel performance. The devices attained are able to achieve excellent electrical performances, high drive current of 2.7 mA/mum, near ideal subthreshold slope (SS) of 65 mV/dec, and low drain-induced barrier lowering (DIBL) of 25 mV/V.