Author_Institution :
Syst. Eng. & Design Autom. Lab., Sydney Univ., NSW, Australia
Abstract :
A knowledge-based system (KBS) shell, called Brel, for VLSI CAD systems is described. Brel has a context recovery system that implements memorization and forgetting and supports a wide range of knowledge representation (frames, rules, procedures, first-order logic, etc.) Brel was developed using PROLOG and successfully used to implement PIAF, a top-down floorplanning system, and TEMPO, a formal verification system for asynchronous circuits based upon temporal logic, and in the development of an automatic layout generation tool. Presented are the memory context, the inference engine, the explanation system. and the multirepresentation access of the knowledge base including the dynamic and static frames
Keywords :
PROLOG; VLSI; circuit layout CAD; knowledge based systems; Brel; PIAF; PROLOG knowledge-based system shell; TEMPO; VLSI CAD; asynchronous circuits; automatic layout generation tool; context recovery system; dynamic frames; explanation system; first-order logic; forgetting; formal verification system; frames; inference engine; knowledge representation; memorization; memory context; multirepresentation access; procedures; rules; static frames; temporal logic; top-down floorplanning system; Artificial intelligence; Australia; Constraint optimization; Design automation; Design engineering; Knowledge based systems; Laboratories; Prototypes; Systems engineering and theory; Very large scale integration;
