Title :
Self-heating effects in sub-micron SOI-MOSFETS
Author_Institution :
DRA Electron. Div., RSRE, Malvern, UK
Abstract :
Silicon MOSFETs fabricated in modem thin-film SOI technologies such as SIMOX, exhibit a number of characteristics which are expected to favour their use in future generations of VLSI circuits. Complete dielectric isolation aids faster circuit speeds by reducing parasitic capacitances and preventing circuit instabilities such as CMOS latch-up, thus allowing much higher packing densities to be achieved. However, due to the relatively low thermal conductivity of silicon dioxide, the power dissipated in the MOSFET leads to significant self-heating effects similar to those observed in power MOSFETs. Noise thermometry has previously been used to directly measure the change in island temperature that occurs as a consequence of self-heating in a long (~8 μm) SOI-MOSFET. This technique has now been used to monitor the island temperature in a short channel (Leff=0.87 μm) device and the results of this are presented in this paper. With self-heating resulting in island temperatures between 50 and 100 K above ambient this will have significant consequences for the reliability of SOI technologies
Keywords :
MOS integrated circuits; insulated gate field effect transistors; reliability; semiconductor-insulator boundaries; thermal analysis; 0.87 micron; SIMOX; SOI-MOSFETS; Si; island temperature; noise thermometry; self-heating effects; short channel device;
Conference_Titel :
Sub-Micron VLSI Reliability, IEE Colloquium on
Conference_Location :
London