The UCSC Kestrel Application-Unspecific Processor

Author

Hughey, Richard ; Di Blas, A.

Author_Institution

Dept. of Comput. Eng., California Univ., Santa Cruz, CA

fYear

2006

fDate

Sept. 2006

Firstpage

163

Lastpage

168

Abstract

The UCSC Kestrel parallel processor is part of an evolution from application-specific to specialized to application-unspecific processing. Kestrel combines an ALU, multiplier, and local memory, with systolic shared registers for seamless merging of communication and computation, and an innovative condition stack for rapid conditionals. The result has been a readily programmable and efficient co-processor for many applications. Experience with Kestrel indicates that programmable systolic processing, and its natural combination with the single instruction-multiple data (SIMD) parallel architecture, will be an effective design choice for years to come

Keywords

application specific integrated circuits; microprocessor chips; multiplying circuits; shift registers; systolic arrays; ALU; UCSC Kestrel; application-unspecific processor; local memory; multiplier; parallel architecture; parallel processor; programmable systolic processing; single instruction-multiple data; systolic shared registers; Algorithm design and analysis; Bioinformatics; Biology computing; Concurrent computing; Costs; Registers; Sequences; Signal processing algorithms; Systolic arrays; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Application-specific Systems, Architectures and Processors, 2006. ASAP '06. International Conference on

Conference_Location

Steamboat Springs, CO

ISSN

2160-0511

Print_ISBN

0-7695-2682-9

Type

conf

DOI

10.1109/ASAP.2006.66

Filename

4019509