DocumentCode :
2768981
Title :
A New Low-Voltage Current Mirror Circuit with Enhanced Bandwidth
Author :
Tikyani, Manish ; Pandey, Rishikesh
Author_Institution :
Dept. of Electron. & Commun. Eng., Thapar Univ., Patiala, India
fYear :
2011
fDate :
7-9 Oct. 2011
Firstpage :
42
Lastpage :
46
Abstract :
In this paper low-voltage current mirror circuit is proposed. The proposed circuit is developed by using four p-type and five n-type MOSFET´s. The proposed circuit is operated at the supply voltage of +1.3 volt. The bandwidth of this circuit has also been enhanced using bandwidth enhancement technique. The proposed circuit has been simulated using Cadence Design Environment in the UMC 0.18 μm CMOS technology. The simulation results have been presented to validate the effectiveness of the proposed circuit.
Keywords :
CMOS integrated circuits; MOSFET circuits; current mirrors; low-power electronics; CMOS technology; cadence design; enhanced bandwidth; low voltage current mirror circuit; n type MOSFET; p type MOSFET; voltage 1.3 V; Bandwidth; Capacitance; Integrated circuit modeling; Logic gates; Mirrors; Transconductance; Transistors; Current mirror; bandwidth enhancement; low-voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computational Intelligence and Communication Networks (CICN), 2011 International Conference on
Conference_Location :
Gwalior
Print_ISBN :
978-1-4577-2033-8
Type :
conf
DOI :
10.1109/CICN.2011.9
Filename :
6112824
Link To Document :
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