Speech processing in FPGA with C-to-RTL compiler technology

In most cases, speech processing algorithms are developed on off-the-shelf microprocessor or DSPs. Recently, the modern FPGA offers virtually unlimited computational resources that can be executed in parallel. Hence, FPGA outperform the DSP in terms of throughput and costs. The design process of FPGA is always considered time consuming and tedious progression. This paper is aimed to explore the technology that shorten the gap between embedded software and hardware, in particular, speech processing in FPGA with C-to-RTL Compiler. Furthermore, The migration and the co-design between software and hardware are also discussed.