Design of quadrature modulator with programmable gain using triple-well BiCMOS technology

A low power, wideband wireless transmitter utilizing programmable gain for IQ modulation to improve transmitted power efficiency is presented. The transmitter architecture replaces high dynamic range analog circuits with high speed digital circuits to perform SDR of Two-Way Radio that requires controllable modulation power. The digital section of modulator is software programmable based to support multiple bandwidths, frequency channels, low power gain reduction and modulation schemes. This quadrature modulator was designed in 0.18 mum SiGe-BiCMOS process to demonstrate the performance of controllable output power for wideband SDR for rigorous dynamic range and linearity. The triple well option is used for better noise isolation and power consumption. The designed quadrature modulator consumes 54 mW that covers all power gain reduction selections from 0 dB to -30 dB and occupies a die area of 1.12 mm².