DocumentCode
2771068
Title
A study of MRF-based circuit implementation
Author
Kermany, A.R. ; Hamid, N.H. ; Burhanudin, Z.A.
Author_Institution
Electr. & Electron. Eng. Dept., Univ. Teknol. Petronas, Tronoh
fYear
2008
fDate
1-3 Dec. 2008
Firstpage
1
Lastpage
4
Abstract
Probabilistic computing provides a new approach towards building fault-tolerant systems. In a fully digital system, the logic states are considered as random variables. One can no longer expect a correct logic signal at all nodes at all times, but only that the joint probability distribution of signal values has the highest likelihood for valid logic states. A case study on probabilistic architecture implementation based on Markov random field (MRF) is discussed. A comparison between MRF-based and standard CMOS-based inverters simulation results in microscale for both noisy and ideal conditions was performed using Cadence tools. The results show that MRF inverter is tolerant to noise as compared to the standard inverter.
Keywords
CMOS integrated circuits; Markov processes; invertors; logic circuits; statistical distributions; CMOS-based inverters simulation; Cadence tools; Markov random field; fault-tolerant system; joint probability distribution; logic signal; probabilistic computing; Analytical models; Buildings; Circuit noise; Design engineering; Fault tolerant systems; Inverters; Logic; Markov random fields; Probability distribution; Random variables; MRF; inverter; noise; probabilistic architecture;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Design, 2008. ICED 2008. International Conference on
Conference_Location
Penang
Print_ISBN
978-1-4244-2315-6
Electronic_ISBN
978-1-4244-2315-6
Type
conf
DOI
10.1109/ICED.2008.4786697
Filename
4786697
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