A CMOS RF front-end with on-chip antenna for V-band broadband wireless communications

This paper presents a V-band receiver front-end for broadband wireless applications. This design consists of an on- chip antenna, a low noise amplifier and a down-conversion mixer with a built-in voltage controlled oscillator as the local oscillator signal. The CPW-fed folded-slot antenna structure was adopted in this work to optimize input impedance matching for the LNA. The measured power gain and input P1dB of the proposed V-band LNA are 18 dB and -17.5 dBm, respectively. The measured isotropic conversion gain at 50 GHz is 23.4 dB. The total V-band RF front-end receiver dissipates 36.6 mW with a 1.2 V supply voltage. The receiver front-end with the on-chip antenna is implemented in a standard 0.13 mum RF CMOS technology without post processing.