Title :
1-GHz Input bandwidth 6-bit under-sampling A/D converter for UWB-IR receiver
Author :
Nakagawa, Tatsuo ; Matsuura, Tatsuji ; Imaizumi, Eiki ; Kudoh, Junya ; Ono, Goichi ; Miyazaki, Masayuki ; Maeki, Akira ; Ogata, Yuji ; Kobayashi, Shinsuke ; Koshizuka, Noboru ; Sakamura, Ken
Author_Institution :
Hitachi Ltd., Tokyo
Abstract :
A 1-GHz input bandwidth 6-bit analog-to-digital (A/D) converter is described. The A/D converter is designed for an ultra-wideband impulse radio (UWB-IR) receiver that needs to digitize an input signal with a higher frequency than the sampling frequency. With the proposed under-sampling technique, sampling is executed with low-current consumption by separating a sampling capacitor from an operational amplifier and accumulating the offset voltage of the amplifier in another capacitor. In addition, a low-power comparator is proposed, which reduces bias current dynamically corresponding to its input voltage level. The A/D converter is implemented in a 0.18-mum CMOS process technology, which achieves an effective number of bits of 4.9 for input signals with frequencies greater than 1 GHz at 32 M samples/s, and consumes 0.89 mA at a 1.8-V supply. The converter occupies a 0.18 mm2 area.
Keywords :
CMOS integrated circuits; UHF integrated circuits; analogue-digital conversion; radio receivers; ultra wideband communication; A-D converter; CMOS process technology; UWB-IR receiver; analog-to-digital converter; current 0.89 mA; frequency 1 GHz; low-current consumption; low-power comparator; sampling capacitor; size 0.18 mum; ultra-wideband impulse radio; voltage 1.8 V; Analog-digital conversion; Bandwidth; Capacitors; Frequency conversion; Operational amplifiers; Radiofrequency amplifiers; Receivers; Sampling methods; Signal design; Voltage;
Conference_Titel :
Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European
Conference_Location :
Munich
Print_ISBN :
978-1-4244-1125-2
DOI :
10.1109/ESSCIRC.2007.4430271