DocumentCode :
277138
Title :
The architecture of the CM-5
Author :
Burnett, N.J.
fYear :
1992
fDate :
33689
Firstpage :
42401
Lastpage :
42402
Abstract :
The Connection Machine system CM5 provides high performance plus ease of use for large, complex, data-intensive applications. Its architecture is designed to scale from a few gigaflops to teraflops or teraops performance for terabyte-sized problems. The CM-5 continues and extends support for the parallel programming model that has proved so successful in the CM-2. To achieve its goals, the CM-5 takes advantage of the latest developments in high-speed VLSI, new compiling technologies, RISC microprocessors, operating systems, and networking. It combines the best features of existing parallel architectures-including fine and coarse-grained concurrence, MIMD and SIMD control, and fault tolerance-in a single, integrated architecture
fLanguage :
English
Publisher :
iet
Conference_Titel :
Medium Grain Distributed Computing, IEE Colloquium on
Conference_Location :
London
Type :
conf
Filename :
168049
Link To Document :
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