DocumentCode
2772080
Title
Optimization of RunBefore decoder and first one detector for MPEG-4 AVC/H.264 CAVLC decoding
Author
Lee, So-Jin ; Park, Joo-Yul ; Chung, Ki-Seok
Author_Institution
Dept. of Electron., Hanyang Univ., Seoul
fYear
2008
fDate
1-3 Dec. 2008
Firstpage
1
Lastpage
5
Abstract
In this paper, we propose a novel RunBefore decoder and a new FOD (First One Detector) for MPEG-4 AVC/H.264 CAVLC decoding. By reusing common blocks aggressively, the proposed FOD has smaller area and less power consumption. Also a new RunBefore decoder which decodes two values in one clock has been designed to improve the decoding performance. The proposed CAVLC decoder has been designed in Verilog HDL, and synthesized by synopsys´ design compiler using magnachip 0.18mum CMOS cell library. Performance evaluation results show that our design has on average 48% faster than conventional designs.
Keywords
decoding; optimisation; video coding; CMOS cell library; MPEG-4 AVC/H.264 CAVLC decoding; MagnaChip; RunBefore decoder; Verilog HDL; first one detector; optimization; size 0.18 mum; synopsys design compiler; Automatic voltage control; Clocks; Decoding; Detectors; Energy consumption; Hardware design languages; MPEG 4 Standard; Table lookup; Throughput; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Design, 2008. ICED 2008. International Conference on
Conference_Location
Penang
Print_ISBN
978-1-4244-2315-6
Electronic_ISBN
978-1-4244-2315-6
Type
conf
DOI
10.1109/ICED.2008.4786754
Filename
4786754
Link To Document