A CMOS 100 MHz to 6 GHz software defined radio analog front-end with integrated pre-power amplifier

Author

Ingels, M. ; Soens, C. ; Craninckx, J. ; Giannini, V. ; Kim, T. ; Debaillie, B. ; Libois, M. ; Goffioul, M. ; Van Driessche, Joris

Author_Institution

Imec Leuven Belgium, Leuven

fYear

2007

fDate

11-13 Sept. 2007

Firstpage

436

Lastpage

439

Abstract

A Software-Defined Radio (SDR) analog front-end is presented that provides extensive programmability of LO generator, LNA, mixers, baseband filters and PPA, supporting various wireless communication standards while guaranteeing a near-optimal power/performance trade-off at any time. The circuit is integrated in a 0.13 mum CMOS technology with 1.2 V supply voltage. This transceiver covers the frequency range from 100 MHz up to 6 GHz by exploiting a flexible zero-IF architecture. The receive path achieves a Noise Figure of 4.8 dB at 174 MHz and 6 dB at 2.4 GHz. For a WLAN OFDM 64 QAM output, the transmitter achieves an EVM better than -29 dB for -0.5 dBm output power at 2.4 GHz and -3.1 dBm output power at 4.9 GHz.

Keywords

CMOS integrated circuits; OFDM modulation; low noise amplifiers; microwave power amplifiers; quadrature amplitude modulation; software radio; transceivers; wireless LAN; CMOS; LNA; QAM; WLAN OFDM; baseband filters; frequency 100 MHz to 6 GHz; integrated pre-power amplifier; local oscillator generator; mixers; noise figure 4.8 dB; noise figure 6 dB; radio transceiver; size 0.13 mum; software defined radio analog front-end; voltage 1.2 V; wireless communication standard; Baseband; CMOS technology; Communication standards; Filters; Integrated circuit technology; Power generation; Software radio; Software standards; Voltage; Wireless communication;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European

Conference_Location

Munich

ISSN

1930-8833

Print_ISBN

978-1-4244-1125-2

Type

conf

DOI

10.1109/ESSCIRC.2007.4430336

Filename

4430336