• DocumentCode
    2772336
  • Title

    A 60-GHz phase-locked loop with inductor-less prescaler in 90-nm CMOS

  • Author

    Hoshino, Hiroaki ; Tachibana, Ryoichi ; Mitomo, Toshiya ; Ono, Naoko ; Yoshihara, Yoshiaki ; Fujimoto, Ryuichi

  • Author_Institution
    Toshiba Corp., Kawasaki
  • fYear
    2007
  • fDate
    11-13 Sept. 2007
  • Firstpage
    472
  • Lastpage
    475
  • Abstract
    A 60-GHz phase-locked loop (PLL) with inductor-less prescaler is fabricated in a 90-nm CMOS process. The inductor-less prescaler has a smaller chip area than previously reported ones. The PLL operates from 61 to 63 GHz and consumes 78 mW from a 1.2 V supply. The phase noise at 100 kHz and 1 MHz offset from carrier are -72 and -80 dBc/Hz, respectively. The prescaler occupies 80 x 40 mum2. The active area of the PLL is 0.6 x 0.6 mm2.
  • Keywords
    CMOS integrated circuits; millimetre wave integrated circuits; phase locked loops; phase noise; prescalers; CMOS process; frequency 60 GHz; frequency 61 GHz to 63 GHz; inductor-less prescaler; phase noise; phase-locked loop; power 78 mW; size 90 nm; voltage 1.2 V; CMOS process; Circuits; Frequency conversion; Inductors; Phase frequency detector; Phase locked loops; Resistors; Ring oscillators; Transceivers; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European
  • Conference_Location
    Munich
  • ISSN
    1930-8833
  • Print_ISBN
    978-1-4244-1125-2
  • Type

    conf

  • DOI
    10.1109/ESSCIRC.2007.4430344
  • Filename
    4430344