DocumentCode
2772393
Title
Profiling and comparison of internal electrical environments of p and n-channel SOI MOSFETs
Author
Mody, J. ; Venkatachalam, A. ; Rodrigues, O. ; Jambulingam, S. ; Ghosh, P.
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Syracuse Univ., NY, USA
fYear
2003
fDate
16-18 Dec. 2003
Firstpage
259
Lastpage
262
Abstract
Internal electrical environment of p-channel SOI MOSFET is simulated and compared with the properties of n-channel SOI MOSFET. Electrical characteristics are modified due to the charge redistribution resulting from the applied bias voltage. Effects of channel shrinkage, for both n- and p-channel have been documented.
Keywords
MOSFET; electric field effects; electric potential; silicon-on-insulator; Si; applied bias voltage; channel shrinkage; charge redistribution; electrical properties; internal electrical environments; n-channel SOI MOSFETs; p-channel SOI MOSFETs; Dielectric thin films; Doping; Electric variables; Insulation; MOS devices; MOSFETs; Semiconductor thin films; Silicon; Thin film devices; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices and Solid-State Circuits, 2003 IEEE Conference on
Print_ISBN
0-7803-7749-4
Type
conf
DOI
10.1109/EDSSC.2003.1283527
Filename
1283527
Link To Document