Mismatch improvement for high image rejection in two path switched-capacitor sigma-delta modulators

In IF-sampling A/D converters employing lowpass sigma-delta modulators, the mismatches between the in-phase (I) and quadrature-phase (Q) channels, including the mismatch between the I and Q sampling capacitors, will limit their image rejection performance. In this paper, a technique of sharing front-end sampling capacitor pairs between I and Q channels is proposed to eliminate their mismatch and thus to improve the image rejection performance of the IF-sampling ADC. Behavioral simulation results are presented to demonstrate the technique.