Software/hardware co-design of a Java-based 32bit microprocessor for mobile multimedia applications

Author

Jiang, Min ; Yang, Sing ; Wang, Xinan ; Zhang, Tianyi

Author_Institution

Sch. of Comput. & Electron. Eng., Peking Univ., Beijing, China

fYear

2003

fDate

18-18 Dec. 2003

Firstpage

497

Lastpage

499

Abstract

A 32bit Java-based processor is designed for mobile multimedia applications to run MIPS-compatible local instructions and some application-specific Java bytecodes in a RISC-like architecture. In Java-mode, some Java bytecodes employed in the specific application are decoded into local instructions by VLSI implementation. With VHDL simulation tools, SW/HW co-design verified that Java bytecodes could be executed on the processor with a local thread for a real-time visual processing. Furthermore, the design was synthesized to physical layout according to 1.2 /spl mu/m standard CMOS technology and the simulation shows that the processor can run at a frequency of 20 MHz.

Keywords

CMOS memory circuits; Java; VLSI; hardware description languages; hardware-software codesign; multimedia systems; real-time systems; reduced instruction set computing; software tools; virtual machines; 1.2 micron; 20 MHz; 32 bit; 32bit microprocessor; CMOS; Java bytecodes; Java codesign; MIPS; RISC; VHDL; VLSI; hardware-software codesign; million instructions per second; mobile multimedia applications; real time visual processing; reduced instruction set computing; very high speed integrated circuit; very large scale integration hardware description language; Application software; CMOS technology; Computer architecture; Decoding; Hardware; Java; Microprocessors; Process design; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid-State Circuits, 2003 IEEE Conference on

Conference_Location

Hong Kong, China

Print_ISBN

0-7803-7749-4

Type

conf

DOI

10.1109/EDSSC.2003.1283580

Filename

1283580