On-chip testing of ADC´s

There are two main approaches to full test of ADC circuits. The first, the classical servo technique has been outlined by Max (1989) and Weimer et al. (1990). This technique stabilises the ADC output for a given demanded analogue input signal. The INL relationship can be directly derived from this technique. The second technique of a Ramp input in conjunction with Tally and Weight analysis can be used to directly derive the DNL of the ADC. For full characterisation of an ADC macro either of these techniques could be used. However as a starting point in designing a testable ADC macro, it is possible to consider the ADC macro as consisting of several separate analogue and digital sub-macros. The source of each parameter error in the ADC is then likely to come from a small number of these submacros. In addition, selected simple tests at the sub-macro connections would reveal a measure of the quality of the entire ADC