DocumentCode :
2775060
Title :
One-dimensional logic gate assignment and interval graphs
Author :
Ohtsuki, Tatsuo ; Mori, Hajimu ; Kuh, Ernest S. ; Kashiwabara, Toshinobu ; Fujisawa, Toshio
Author_Institution :
Nippon Electric Co.
fYear :
1979
fDate :
1979
Firstpage :
101
Lastpage :
106
Keywords :
Algorithm design and analysis; Integrated circuit interconnections; Logic arrays; Logic design; Logic gates; Microelectronics; NP-complete problem; Polynomials; Wires; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Software and Applications Conference, 1979. Proceedings. COMPSAC 79. The IEEE Computer Society's Third International
Type :
conf
DOI :
10.1109/CMPSAC.1979.762474
Filename :
762474
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2775060
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