Title :
CMOS/ECL circuits with reduced power dissipation
Author :
Hendry, D.C. ; Massingham, J.W.
Author_Institution :
Dept. of Eng., Aberdeen Univ., UK
Abstract :
The approach proposed in this paper is somewhat different from the norm because pure ECL and CMOS circuitry is used with the assets of each being used used to the full. The ECL circuits are used on critical signals such as the carry line in an adder whereas CMOS circuitry is used on noncritical quasi-static inputs. Power consumption is kept to a minimum by powering off the ECL section when it is not required
Keywords :
BIMOS integrated circuits; emitter-coupled logic; integrated circuit technology; CMOS/ECL circuits; adder; carry line; critical signals; noncritical quasi-static inputs; power dissipation;
Conference_Titel :
Technology and Application of Combined Bi-Polar and CMOS Semiconductor Processes, IEE Colloquium on
Conference_Location :
London
