Overloading and Conflict Resolution at the Design Unit Level in HDLs

The recent trend in the design of the HDLs shows a shift towards the domain of Object Oriented Programming. The traditional approach of HDLs is changing a lot due to the invention of new design approaches. In this paper an effort has been made to incorporate the concept of polymorphism in HDLs at the design unit level. Section I gives an introduction to the traditional HDLs and some example of shifting the paradigm towards the OOP. In the next two sections (Section II and III), the root level concepts and uniqueness of the overloading from the point of view of the design units have been explained. Section IV summarizes the proposed dump/restore mechanism to be incorporated to resolve the conflict during the retrieval of design unit. In the section V, the possible approaches to resolve the master during elaboration have been discussed with the help of a real life VHDL analyzer. Section VI depicts the master binding while declaring the architecture/ configuration and possible BNF changes in the syntax of design units. And at the end, in section VII, the conclusion and further scope of the work has been explained.