• DocumentCode
    2776655
  • Title

    Implementation of an OpenVG Rasterizer with Configurable Anti-Aliasing and Multi-Window Scissoring

  • Author

    Huang, Ren ; Chae, Soo-Ik

  • Author_Institution
    Seoul National University, Korea
  • fYear
    2006
  • fDate
    Sept. 2006
  • Firstpage
    179
  • Lastpage
    179
  • Abstract
    This paper describes an OpenVG-compliant hardware rasterizer with configurable anti-aliasing and multi-window scissoring. This rasterizer requires 129K logic gates with 2KB on-chip SRAM and provides satisfactory image quality with a reasonable rasterizer speed at the operational frequency of 100MHz. In this paper, we propose an optimized scanline algorithm, which provides better performance than the conventional scanline algorithm with supersampline while maintaining the flexibility and the hardware simplicity. We also propose a fast LUT-based scissoring algorithm, which has zero-latency in most of the cases. The hardware implementation of this rasterizer is explained in detail.
  • Keywords
    Displays; Filling; Frequency; Graphics; Hardware; Image quality; Logic gates; Pipelines; Random access memory; Rendering (computer graphics);
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer and Information Technology, 2006. CIT '06. The Sixth IEEE International Conference on
  • Conference_Location
    Seoul
  • Print_ISBN
    0-7695-2687-X
  • Type

    conf

  • DOI
    10.1109/CIT.2006.100
  • Filename
    4019963