Optimization of Power Delivery Design and Methodologies

Author

Tau, Yee Hung See

Author_Institution

Intel Penang Design Center, Penang

fYear

2006

fDate

11-14 Dec. 2006

Firstpage

1

Lastpage

3

Abstract

This paper covers the latest development of next generation I/O interface 3D power delivery modeling methodology to meet the challenging requirements of I/O interfaces. A method for I/O interface power delivery analysis covering package and system level has been developed by combining 3D field solver and Spice simulation. This paper focuses on how designing an optimized and economical power delivery system in order to suppress the high frequency noise effectively with the right tool.

Keywords

SPICE; circuit layout; circuit noise; circuit optimisation; circuit simulation; electronics packaging; interference suppression; network synthesis; power supply circuits; 3D field solver; 3D power delivery modeling methodology; I-O interface; Spice simulation; economical power delivery system; high frequency noise suppression; optimization; package layout; power delivery design; Circuit noise; Delay effects; Design methodology; Design optimization; Noise figure; Noise reduction; Packaging; Rails; Resonance; Resonant frequency;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Materials and Packaging, 2006. EMAP 2006. International Conference on

Conference_Location

Kowloon

Print_ISBN

978-1-4244-0834-4

Electronic_ISBN

978-1-4244-0834-4

Type

conf

DOI

10.1109/EMAP.2006.4430625

Filename

4430625